Hitachi H8S/2199 Hardware Manual page 416

Single-chip microcomputer
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Bit 6    Receive Interrupt Enable (RIE): Enables or disables receive-data-full interrupt (RXI)
request and receive-error interrupt (ERI) request generation when serial receive data is transferred
from RSR1 to RDR1 and the RDRF flag in SSR1 is set to 1.
Bit 6
RIE
Description
0
Receive-data-full interrupt (RXI) request and receive-error interrupt (ERI) request
disabled*
1
Receive-data-full interrupt (RXI) request and receive-error interrupt (ERI) request
enabled
Note:
*
RXI and ERI interrupt request cancellation can be performed by reading 1 from the
RDRF, FER, PER, or ORER flag, then clearing the flag to 0, or clearing the RIE bit to 0.
Bit 5    Transmit Enable (TE): Enables or disables the start of serial transmission by the SCI.
Bit 5
TE
Description
0
Transmission disabled
1
Transmission enabled
Notes: 1. The TDRE flag in SSR1 is fixed at 1.
2. In this state, serial transmission is started when transmit data is written to TDR1 and the
TDRE flag in SSR1 is cleared to 0.
SMR1 setting must be performed to decide the transmission format before setting the
TE bit to 1.
Bit 4    Receive Enable (RE): Enables or disables the start of serial reception by the SCI.
Bit 4
RE
Description
0
Reception disabled
1
Reception enabled
Notes: 1. Clearing the RE bit to 0 does not affect the RDRF, FER, PER, and ORER flags, which
retain their states.
2. Serial reception is started in this state when a start bit is detected in asynchronous
mode or serial clock input is detected in synchronous mode.
SMR1 setting must be performed to decide the reception format before setting the RE
bit to 1.
*1
*2
*1
*2
Rev. 1.0, 02/00, page 407 of 1141
(Initial value)
(Initial value)
(Initial value)

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