Hitachi H8S/2199 Hardware Manual page 439

Single-chip microcomputer
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Figure 22.6 shows an example of the operation for transmission in asynchronous mode.
Start
bit
1
0
D0
TDRE
TEND
TXI interrupt
Data written to TDR1 and
request
TDRE flag cleared to 0
generated
in TXI interrupt handling
routine
Figure 22.6 Example of Operation in Transmission in Asynchronous Mode
Rev. 1.0, 02/00, page 430 of 1141
Data
Parity
bit
D1
D7
0/1
TXI interrupt request
generated
1 frame
(Example with 8-Bit Data, Parity, One Stop Bit)
Stop
Start
bit
bit
1
0
D0
D1
Data
Parity
Stop
bit
bit
D7
0/1
1
TEI interrupt request
generated
1
Idle state
(mark state)

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