Hitachi H8S/2199 Hardware Manual page 744

Single-chip microcomputer
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Example
The values set to detect the vertical and horizontal sync signals (SEPV, SEPH) from Csync
are required to meet the following conditions. Assumed that the set values in VTHR
register were VVTH and HVTH,
(VVTH-1) × 2/φs > Hpulse
(HVTH-2) × 2/φs ≤ Hpulse/2 < (HVTH-1) × 2/φs
Where, Hpulse is pulse width (µs) of the horizontal sync signal, and φs is servo clock
(fosc/2).
Thus, if φs = 5 MHz, NTSC system is used,
(VVTH-1) × 0.4µs > 4.7µs
∴VVTH ≥ H'D
(VVTH-2) × 0.4µs ≤ 2.35µs < (HVTH-1) × 0.4µs
∴VVTH ≥ H'7
Note: This circuit detects the pulse with the width set in VTHR. If a noise pulse with the width
greater than the set value is input, the circuit regards it as a sync signal.
Rev. 1.0, 02/00, page 738 of 1141

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