Bit 5 A/D Interrupt Enable (ADIE): Selects enable or disable of interrupt (ADI) generation
upon A/D conversion end.
Bit 5
ADIE
Description
0
Interrupt (ADI) upon A/D conversion end is disabled
1
Interrupt (ADI) upon A/D conversion end is enabled
Bit 4 Software A/D Start Flag (SST): Indicates or controls the start and end of software-
triggered A/D conversion. This bit remains 1 during software-triggered A/D conversion.
When 0 is written in this bit, software-triggered A/D conversion operation can forcibly be aborted.
Bit 4
SST
Description
0
Read: Indicates that software-triggered A/D conversion has ended or been stopped
Write: Software-triggered A/D conversion is aborted
1
Read: Indicates that software-triggered A/D conversion is in progress
Write: Starts software-triggered A/D conversion
Bit 3 Hardware A/D Status Flag (HST): Indicates the status of hardware- or external-triggered
A/D conversion. When 0 is written in this bit, A/D conversion is aborted regardless of whether it
was hardware-triggered or external-triggered.
Bit 5
HST
Description
0
Read: Hardware- or external-triggered A/D conversion is not in progress
Write: Hardware- or external-triggered A/D conversion is aborted
1
Hardware- or external-triggered A/D conversion is in progress
Rev. 1.0, 02/00, page 522 of 1141
(Initial value)
(Initial value)
(Initial value)