Section 6 Interrupt Controller; Overview; Features - Hitachi H8S/2199 Hardware Manual

Single-chip microcomputer

Table of Contents

This LSI controls interrupts by means of an interrupt controller. The interrupt controller has the

following features:

• Two Interrupt Control Modes

 Either of two interrupt control modes can be set by means of the INTM1 and INTM0 bits

in the system control register (SYSCR).

• Priorities Settable with ICR

 An interrupt control register (ICR) is provided for setting interrupt priorities. Three

priority levels can be set for each module for all interrupts except NMI.

• Independent Vector Addresses

 All interrupt sources are assigned independent vector addresses, making it unnecessary for

the source to be identified in the interrupt handling routine.

• Six External Interrupt Pins

 NMI is the highest-priority interrupt, and is accepted at all times.

 Falling edge, rising edge, or both edge detection can be selected for interrupt IRQ0.

 Falling edge or rising edge can be individually selected for interrupts IRQ5 to IRQ1.

Note: * In this LSI, the watch dog timer generates NMIs.

Section 6 Interrupt Controller

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