Hitachi H8S/2199 Hardware Manual page 578

Single-chip microcomputer

Table of Contents

Reference Period Register 2 (CRF)

Initial value :

The reference period register 2 (CRF) is an 16-bit write-only buffer register which generates the

reference signals to control the capstan phase (CREF). CRF is accessible in word units only. If a

read is attempted, an undetermined value is read out. The value set in CRF should be 1/2 of the

desired reference signal period.

When data is written in CRF, it is stored in the buffer once, and then fetched into CRF by a match

signal of the comparator. (The data which generates the reference signal is updated by the match

signal.) A forcible write, such as initial setting, etc., should be done by a dummy read of CRF.

If a byte-write in CRF is attempted, correct operation is not guaranteed. CRF is initialized to

H'FFFF by a reset and in stand-by and module stop modes.

Use bit 4 (CR/RF bit) in the capstan phase error detection control register (CPGCR) to switch

between REF30 and CREF for capstan phase control. See section 26.9, Capstan Phase Error

REF30 Counter Register (RFC)

Initial value :

R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W

The REF30 counter register (RFC) is a register which determines the initial value of the free-run

counter when it generates REF30 signals in playback. When data is written in RFC, its value is

written in the counter by a match signal of the comparator. If the bit 1 (VST) of RFM is set to 1,

the counter is set by the Video FF signal when the drum phase is in FIX ON. The counter setting

by the Video FF signal should be done by setting bit 1 (VST) and bit 0 (VEG) of the RFM. Do

not set the RFC to a value greater than 1/2 of the reference period register 1 (RFD) value.

RFC is a read/write register. If a read is attempted, the value of the counter is read out. If a byte-

access is attempted, correct operation is not guaranteed. RFC is initialized to H'0000 by a reset

and in stand-by and module stop modes.

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