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H'D074: X-Value/TRK-Value Control Register
Bit
:
7
—
Initial value
:
1
R/W
:
—
External sync signal edge select bit
0 Generated at EXCAP rising edge
1 Generated at EXCAP rising and falling edge
H'D078: Drum 12-Bit PWM Data Register DPWDR: Drum 12-Bit PWM
Bit
:
15
14
—
—
Initial value
:
1
1
R/W
:
—
—
6
5
CAPRF
AT/MU
TRK/X
0
0
W
W
Capstan phase adjustment register select bit
0 CAPREF30 is generated only by XDR setting value
1 CAPREF30 is generated by XDR and TRDR setting values
Capstan phase adjustment auto/manual select bit
0
Manual mode
1
Auto mode
13
12
11
10
—
—
DPWDR11
DPWDR10
1
1
0
0
—
—
R/W
R/W
XTCR: X-Value, TRK-Value Adjustment Circuit
4
3
2
EXC/REF
XCS
0
0
0
W
W
W
Clock source select bit
0 φs
1 φs/2
Reference signal select bit
0 Generated by REF30P signal
1 Generated by external referece signal
(Initial value)
(Initial value)
9
8
7
DPWDR9
DPWDR8
DPWDR7
DPWDR6
0
0
0
R/W
R/W
R/W
R/W
1
0
DVREF1
DVREF0
0
0
R/W
R/W
REF30P frequency division rate select bit
DVREF1 DVREF0
Description
0
0
1-division
1
2-division
1
0
3-division
1
4-division
(Initial value)
(Initial value)
(Initial value)
6
5
4
3
DPWDR5
DPWDR4
DPWDR3
0
0
0
0
R/W
R/W
R/W
Rev. 1.0, 02/00, page 1011 of 1141
(Initial value)
2
1
0
DPWDR2
DPWDR1
DPWDR0
0
0
0
R/W
R/W
R/W
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