Hitachi H8S/2199 Hardware Manual page 1036

Single-chip microcomputer
Table of Contents

Advertisement

2
H'D0EE: I
C Bus Data Register ICDR0: I
Bit
:
ICDR7
Initial value :
R/W
:
R/W
Note: Refer to section 23.2.1,
H'D0EE: Second Slave Address Register SARX0: I
7
Bit
:
SVAX6
0
Initial value :
R/W
:
R/W
Note: Refer to section 23.2.3,
Rev. 1.0, 02/00, page 1034 of 1141
7
6
ICDR6
ICDR5
R/W
R/W
I
2
C
Bus Data Register (ICDR).
6
5
SVAX5
SVAX4
0
0
R/W
R/W
Second Slave Address Register (SARX), and section 23.2.2, Slave Address Register (SAR).
2
C Bus Interface
5
4
ICDR4
ICDR3
R/W
R/W
2
C Bus Interface
4
3
SVAX3
SVAX2
0
0
R/W
R/W
3
2
ICDR2
ICDR1
R/W
R/W
2
1
SVAX1
SVAX0
0
0
R/W
R/W
Format select
Used combined FS bit in SAR.
1
0
ICDR0
R/W
0
FSX
1
R/W

Advertisement

Table of Contents
loading

Table of Contents