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H'D240: Sync Separation Input Mode Register SEPIMR: Sync Separator
7
:
Bit
CCMPV1
Initial value
:
0
R/W
:
R/W
Csync separation comparator slicing voltage select
CCMPV1 CCMPV0
6
5
CCMPV0
CCMPSL
0
0
R/W
R/W
Vsync input signal select
0
1
Sync signal polarity select
0
1
Csync separation comparator input select
0
The Csync separation comparator input is selected
The Csync/Hsync terminal operates as an output terminal
The Csync Schmitt input is selected
1
The Csync/Hsync terminal operates as an input terminal
0
0
The Csync slicing level is 10 IRE
1
The Csync slicing level is 5 IRE
1
0
The Csync slicing level is 15 IRE
1
The Csync slicing level is 20 IRE
4
3
SYNCT
VSEL
DLPFON
0
0
R/W
R/W
Reference clock frequency select
576 times the horizontal sync frequency
0
448 times the horizontal sync frequency
1
Digital LPF control
0
The digital LPF does not operate (Initial value)
1
The digital LPF operates
Vsync Schmitt input
Csync Schmitt input
Description
2
1
FRQSEL
—
0
0
R/W
R/W
R/W
(Initial value)
(Initial value)
(Initial value)
(Initial value)
Rev. 1.0, 02/00, page 1083 of 1141
0
0
(Initial value)
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