Multiprocessor Communication Function - Hitachi H8S/2199 Hardware Manual

Single-chip microcomputer

Table of Contents

Figure 22.9 shows an example of the operation for reception in asynchronous mode.

Multiprocessor Communication Function

The multiprocessor communication function performs serial communication using a

multiprocessor format, in which a multiprocessor bit is added to the transfer data, in asynchronous

mode. Use of this function enables data transfer to be performed among a number of processors

sharing transmission lines.

When multiprocessor communication is carried out, each receiving station is addressed by a

unique ID code.

The serial communication cycle consists of two component cycles: an ID transmission cycle

which specifies the receiving station, and a data transmission cycle. The multiprocessor bit is used

to differentiate between the ID transmission cycle and the data transmission cycle.

The transmitting station first sends the ID of the receiving station with which it wants to perform

serial communication as data with a 1 multiprocessor bit added. It then sends transmit data as data

with a 0 multiprocessor bit added.

The receiving station skips the data until data with a 1 multiprocessor bit is sent.

When data with a 1 multiprocessor bit is received, the receiving station compares that data with its

own ID. The station whose ID matches then receives the data sent next. Stations whose ID does

not match continue to skip the data until data with a 1 multiprocessor bit is again received. In this

way, data communication is carried out among a number of processors.

Figure 22.10 shows an example of inter-processor communication using a multiprocessor format.

Rev. 1.0, 02/00, page 434 of 1141

RXI interrupt

Figure 22.9 Example of SCI Operation in Reception

(Example with 8-Bit Data, Parity, One Stop Bit)

RDR1 data read

and RDRF flag

cleared to 0 in

RXI interrupt

handling routine

ERI interrupt request

generated by framing

(mark state)