Hitachi H8S/2199 Hardware Manual page 653

Single-chip microcomputer
Table of Contents

Advertisement

Error data
latch signal
(DVCFG)
Preset data
load signal
Preset period
Specified speed value
(2 counts)
Counter
–value +value
Preset value
Latch data 0
(no error)
Figure 26.33 Example of the Capstan Speed Error Detection
Rev. 1.0, 02/00, page 647 of 1141

Advertisement

Table of Contents
loading

Table of Contents