Hitachi H8S/2199 Hardware Manual page 1060

Single-chip microcomputer
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H'D13B: Timer J Control Register TMJC: Timer J
7
Bit
:
BUZZ1
Initial value :
0
R/W
:
R/W
Buzzer output select bits
BUZZ1
Rev. 1.0, 02/00, page 1058 of 1141
6
5
BUZZ0
MON1
0
0
R/W
R/W
Monitor output select bits
MON1
0
1
Note: * Don't care.
BUZZ0
Output signal
φ/4096
0
0
φ/8192
1
1
0
Output monitor signal
1
Output timer J BUZZ signal
4
3
MON0
TMJ2IE
EXN
0
1
R/W
R/W
R/W
TMJ1I interrupt enable bit
TMJ2I interrupt enable bit
0
1
Expansion function control bit
EXN
0
TMJ-2 expansion function is enabled
1
TMJ-2 expansion function is disabled (Initial value)
MON0
Monitor output select
0
PB or REC-CTL
1
DVCTL
*
Output TCA7
Frequency when
φ
= 10 MHz
(Initial value)
2.44 kHz
1.22 kHz
2
1
0
TMJ1IE
PS22
0
0
1
R/W
R/W
PS22
Used in combination with bits PS21
and PS20 to select the TMJ-2
input clock.
0
TMJ1I interrupt request is disabled
1
TMJ1I interrupt request is enabled
TMJ2I interrupt request is disabled (Initial value)
TMJ2I interrupt request is enabled
Description
(Initial value)
(Initial value)

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