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29.5.9
Screen Control Register (DCNTL)
Bit:
15
CDSPON
Initial value:
0
R/W
R/W
7
Bit:
BR
Initial value:
0
R/W
R/W
The DCNTL is a 16-bit read/write register used to switch between superimposed and text display
modes, set the background and color for text display mode in screen units, and turn OSD display
on and off.
When reset, when the module is stopped, in sleep mode, in standby mode, in watch mode, in
subactive mode, or in subsleep mode, the DCNTL is initialized to H'0000.
When the OSD display update timing control bit (DTMV) is 1, the OSD display is updated to the
screen control register settings except the setting in bit 13 (LACEM bit) synchronously with the
Vsync signal (OSDV).
Bit 15 OSD C. Video Display Enable Bit (CDSPON): Turns OSDC C.Video display output on
and off.
Bit 15
CDSPON
Description
0
OSD C.Video display is off
1
OSD C.Video display is on
Bit 14 Superimposed/Text Display Mode Select Bit (DISPM): Selects superimposed mode or
text display mode.
When selecting a display mode, the dot clock also serves as the AFC circuit reference clock, and
so the AFC circuit reference Hsync signal must be switched. For details, refer to section 27.3.6,
Automatic Frequency Controller (AFC).
Bit 14
DISPM
Description
0
Superimposed mode is selected
1
Text display mode is selected
Rev. 1.0, 02/00, page 850 of 1141
14
13
DISPM
LACEM
0
0
R/W
R/W
6
5
BG
BB
0
0
R/W
R/W
12
11
BLKS
OSDON
0
0
R/W
R/W
4
3
BLU1
BLU0
0
0
R/W
R/W
10
9
—
EDGE
0
0
—
R/W
2
1
CAMP
KAMP
0
0
R/W
R/W
(Initial value)
(Initial value)
8
EDGC
0
R/W
0
BAMP
0
R/W
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