Timer Counter B (Tcb); Timer Load Register B (Tlb) - Hitachi H8S/2199 Hardware Manual

Single-chip microcomputer
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12.2.2

Timer Counter B (TCB)

Bit :
Initial value :
R/W :
The TCB is an 8-bit readable register which works to count up by the internal clock inputs and
external event inputs. The input clock can be selected by the TMB12 to TMB10 of the TMB.
When the TCB overflows (H'FF → H'00 or H'FF → TLB setting), a interrupt request of the Timer
B will be issued.
When reset, the TCB is initialized to H'00.
12.2.3

Timer Load Register B (TLB)

Bit :
Initial value :
R/W :
The TLB is an 8-bit write only register which works to set the reloading value of the TCB.
When the reloading value is set to the TLB, the value will be simultaneously loaded to the TCB
and the TCB starts counting up from the set value. Also, during an auto reloading operation, when
the TCB overflows, the value of the TLB will be loaded to the TCB. Consequently, the
overflowing cycle can be set within the range of 1 to 256 input clocks.
When reset, the TLB is initialized to H'00.
7
6
TCB17
TCB16
TCB15
0
0
R
R
7
6
TLB17
TLB16
TLB15
0
0
W
W
5
4
3
TCB14
TCB13
0
0
0
R
R
R
5
4
3
TLB14
TLB13
0
0
0
W
W
W
2
1
TCB12
TCB11
0
0
R
R
2
1
TLB12
TLB11
0
0
W
W
Rev. 1.0, 02/00, page 257 of 1141
0
TCB10
0
R
0
TLB10
0
W

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