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H'D136: A/D Trigger Select Register ADTSR: A/D Converter
Bit
:
—
Initial value :
R/W
:
H'D138: Timer Load Register K TLK: Timer J
Bit :
Initial value :
R/W :
H'D138: Timer Counter K TCK: Timer J
Bit :
Initial value :
R/W :
H'D139: Timer Load Register J TLJ: Timer J
Bit :
Initial value :
R/W :
Rev. 1.0, 02/00, page 1056 of 1141
7
6
—
1
1
—
—
7
6
TLR27
TLR26
TLR25
1
1
W
W
7
6
TDR27
TDR26
TDR25
1
1
R
R
7
6
TLR17
TLR16
TLR15
1
1
W
W
5
4
—
—
1
1
—
—
Trigger select bits
TRGS1 TRGS0
0
0
1
1
0
1
5
4
TLR24
TLR23
1
1
W
W
5
4
TDR24
TDR23
1
1
R
R
5
4
TLR14
TLR13
1
1
W
W
3
2
TRGS1
—
—
1
1
R/W
—
—
Hardware- or external-triggered A/D
conversion is disabled
Hardware-triggered (ADTRG) A/D conversion
is selected
Hardware-triggered (DFG) A/D conversion
is selected
External-triggered (ADTRG) A/D conversion
is selected
3
2
TLR22
TLR21
1
1
W
W
3
2
TDR22
TDR21
1
1
R
R
3
2
TLR12
TLR11
1
1
W
W
1
0
TRGS0
0
0
R/W
(Initial value)
1
0
TLR20
1
1
W
W
1
0
TDR20
1
1
R
R
1
0
TLR10
1
1
W
W
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