Hitachi H8S/2199 Hardware Manual page 1069

Single-chip microcomputer
Table of Contents

Advertisement

2
H'D159: I
C Bus Status Register ICSR1: I
7
Bit
:
ESTP
Initial value
:
0
R/W
:
R/(W)*
R/(W)*
Normal stop condition detection flag
0 No normal stop condition
[Clearing conditions]
(1) When 0 is written in STOP after reading STOP = 1
(2) When the IRIC flag is cleared to 0
• In I
1
Normal stop condition detected
[Setting conditions]
– When a stop condition is detected after completion of frame transfer
• In other mode
No meaning
Error stop condition detection flag
0 No error stop condition
[Clearing conditions]
(1) When 0 is written in ESTP after reading ESTP = 1
(2) When the IRIC flag is cleared to 0
• In I
2
1
C bus format slave mode
Error stop condition detected
[Setting conditions]
– When a stop condition is detected during frame transfer
• In other mode
No meaning
Note: * Only 0 can be written to clear the flag.
6
5
4
3
STOP
IRTR
AASX
AL
0
0
0
0
R/(W)*
R/(W)*
R/(W)*
Arbitration lost flag
0 Bus arbitration won
[Clearing conditions]
(1) When ICDR data is written (transmit mode) or read (receive mode)
(2) When 0 is written in AL after reading AL = 1
1 Arbitration lost
[Setting conditions]
(1) If the internal SDA and SDA pin disagree at the rise of SCL in master transmit mode
(2) If the internal SCL line is high at the fall of SCL in master transmit mode
Second slave address recognition flag
0 Second slave address not recognized
[Clearing con ditions]
(1) When 0 is written in AASX after reading AASX = 1
(2) When a start condition is detected
(3) In master mode
1 Second slave address recognized
[Setting conditions]
When the second slave address is detected in slave receive mode
I
2
C bus interface continuous transmission/reception interrupt request flag
0 Waiting for transfer, or transfer in progress
[Clearing conditions]
(1) When 0 is written in IRTR after reading IRTR = 1
(2) When the IRIC flag is cleared to 0
1 Continuous transfer state
[Setting conditions]
• In I
C bus interface slave mode
2
– When the TDRE or RDRF flag is set to 1 when AASX = 1
• In other mode
– When the TDRE or RDRF flag is set to 1
2
C bus format slave mode
(Initial value)
2
C Bus Interface
2
1
0
AAS
ADZ
ACKB
0
0
0
R/(W)*
R/(W)*
R/W
Acknowledge bit
0 Receive mode: 0 is output at acknowledge output timing
Transmit mode: Indicates that the receiving device has acknowldeged the data (signal is 0)
1 Receive mode; 1 is output at acknowledge output timing
Transmit mode: Indicates that the receiving device has not acknowldeged the data (signal is 1)
General call address recognition flag
0 General call address not recognized
[Clearing conditions]
(1) When ICDR data is written (transmit mode) or read (receive mode)
(2) When 0 is written in ADZ after reading ADZ = 1
(3) In master mode
1 General call address recognized
[Setting conditions]
When the general call address is detected when FSX = 0 or FS = 0 in slave receive mode
Slave address recognition flag
0 Slave address or general call address not recognized
[Clearing conditions]
(1) When ICDR data is written (transmit mode) or read (receive mode)
(2) When 0 is written in AAS after reading AAS = 1
(3) In master mode
1 Slave address or general call address recognized
[Setting conditions]
When the slave address or general call address is detected when FS = 0 in slave receive mode
(Initial value)
(Initial value)
(Initial value)
(Initial value)
Rev. 1.0, 02/00, page 1067 of 1141
(Initial value)
(Initial value)
(Initial value)

Advertisement

Table of Contents
loading

Table of Contents