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Servo Interrupt Request Register 1 (SIRQR1)
Bit :
IRRDRM3
Initial value :
R/W :
R/(W)*
Note: * Only 0 can be written to clear the flag.
SIRQR1 is an 8-bit read/write register that indicates interrupt request in the servo section. If the
interrupt request has occurred, the corresponding bit is set to 1.
Only 0 can be written to clear the flag. It is initialized to H'00 by a reset, or in stand-by or module
stop mode.
Bit 7 Drum Phase Error Detector Interrupt Request Bit (IRRDRM3)
Bit 7
IRRDRM3
0
1
Bit 6 Drum Speed Error Detector (Lock Detection) Interrupt Request Bit (IRRDRM2)
Bit 6
IRRDRM2
0
1
Bit 5 Drum Speed Error Detector (OVF, Latch) Interrupt Request Bit (IRRDRM1)
Bit 5
IRRDRM1
0
1
Rev. 1.0, 02/00, page 752 of 1141
7
6
IRRDRM2 IRRDRM1
0
0
R/(W)*
R/(W)*
Description
No interrupt request from the drum phase error detector.
Interrupt requested from the drum phase error detector.
Description
No interrupt request from the drum speed error detector (lock detection).
Interrupt requested from the drum speed error detector (lock detection).
Description
No interrupt request from the drum speed error detector (OVF, latch).
Interrupt requested from the drum speed error detector (OVF, latch).
5
4
IRRCAP3 IRRCAP2 IRRCAP1 IRRHSW2 IRRHSW1
0
0
R/(W)*
R/(W)*
3
2
0
0
R/(W)*
R/(W)*
1
0
0
0
R/(W)*
(Initial value)
(Initial value)
(Initial value)
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