Hitachi H8S/2199 Hardware Manual page 630

Single-chip microcomputer
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Bits 7 and 6    Clock Source Selection Bits (DFCS1, DFCS0): DFCS1 and DFCS0 select the
clock to be supplied to the counter. (φs = fosc/2)
Bit 7
Bit 6
DFCS1
DFCS0
0
0
1
1
0
1
Bit 5    Counter Overflow Flag (DFOVF): DFOVF flag indicates the overflow of the 16-bit
timer counter. It is cleared by writing 0. Write 0 after reading 1. Setting has the highest priority
in this flag. If a flag set and 0 write occurs simultaneously, the latter is invalid.
Bit 5
DFOVF
Description
0
Normal state.
1
Indicates that overflow has occurred in the counter.
Bit 4    Error Data Limit Function Selection Bit (DFRFON): Enables the error data limit
function. (Limit values are the values set in the lock range data registers (DFRUDR and
DFRLDR)).
Bit 4
DFRFON
0
1
Bit 3    Drum Lock Flag (DF-R/UNR): Sets a flag if an underflow occurred in the drum lock
counter.
Bit 3
DF-R/UNR
0
1
Rev. 1.0, 02/00, page 624 of 1141
Description
φs
φs/2
φs/4
φs/8
Description
Disables limit function.
Enables limit function.
Description
Indicates that the drum speed system is not locked.
Indicates that the drum speed system is locked.
(Initial value)
(Initial value)
(Initial value)
(Initial value)

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