Hitachi H8S/2199 Hardware Manual page 1027

Single-chip microcomputer
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H'D0B2: H Pulse Adjustment Start Time Setting Register HRTR: Sync Detector (Servo)
Bit :
HRTR7
Initial value :
R/W :
H'D0B3: H Pulse Width Setting Register HPWR: Sync Detector (Servo)
Bit :
Initial value :
R/W :
H'D0B4: Noise Detection Window Setting Register NWR: Sync Detector (Servo)
Bit :
Initial value :
R/W :
H'D0B5: Noise Detection Register NDR: Sync Detector (Servo)
Bit :
NDR7
Initial value :
R/W :
7
6
HRTR6
HRTR5
0
0
W
W
7
6
1
1
7
6
NWR5
1
1
W
7
6
NDR6
NDR5
0
0
W
W
5
4
HRTR4
HRTR3
0
0
W
W
5
4
HPWR3
1
1
5
4
NWR4
NWR3
0
0
W
5
4
NDR4
NDR3
0
0
W
W
3
2
HRTR2
HRTR1
0
0
W
W
3
2
HPWR2
HPWR1
0
0
W
W
3
2
NWR2
NWR1
0
0
W
W
3
2
NDR2
NDR1
0
0
W
W
Rev. 1.0, 02/00, page 1025 of 1141
1
0
HRTR0
0
0
W
W
1
0
HPWR0
0
0
W
W
1
0
NWR0
0
0
W
W
1
0
NDR0
0
0
W
W

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