Hitachi H8S/2199 Hardware Manual page 359

Rewriting Timing for
No. the CKS1 and CKS0
High → low level
3
changeover
High → high level
4
changeover
Note: * The count clock signals are issued determining the changeover timing as the falling
edge to have the FRC to count up.
Rev. 1.0, 02/00, page 346 of 1141
FRC Operation
Clock before
the changeover
Clock after
the changeover
Count
clock
FRC N
Clock before
the changeover
Clock after
the changeover
Count
clock
FRC N
*
N+1
Rewriting of the CKS1 and CKS0
N+1
Rewriting of the CKS1 and CKS0
N+2
N+2