Horizontal Sync Signal Threshold Register (Hvthr) - Hitachi H8S/2199 Hardware Manual

Single-chip microcomputer

Table of Contents

Horizontal Sync Signal Threshold Register (HVTHR)

Initial value :

The HVTHR is a 5-bit write-only register for specifying the threshold value for the digital H

separation counter; this value is used to generate the SEPH signal from the Csync signal. The

SEPH signal is set to 1 when the digital H separation counter value matches the HVTHR value

while the Csync is high, and is reset to 0 when the digital H separation counter value becomes 00

while the Csync is low. When reset, the HVTHR is initialized to H'E0.

Figures 27.3 and 27.4 show the HVTHR value and the SEPH signal generation timing.

Digital H separation

Figure 27.3 HVTHR Value and SEPH Generation Timing

Rev. 1.0, 02/00, page 770 of 1141

1.6 µs to 2.0 µs

When Equalizing Pulses Are Detected