Bit 0 HSW Timing Generator (OVW, Matching, STRIG) Interrupt Permission Bit
(IRRHSW1)
Bit 0
IRRHSW1
0
1
Rev. 1.0, 02/00, page 754 of 1141
Description
No interrupt request from the HSW timing generator (OVW, matching, STRIG).
Interrupt requested from the HSW timing generator (OVW, matching, STRIG).
(Initial value)