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Section 17 Watchdog Timer (WDT)
17.1
Overview
This LSI has an on-chip watchdog timer with one channel (WDT) for monitoring system
operation. The WDT outputs an overflow signal if a system crash prevents the CPU from writing
to the timer counter, allowing it to overflow. At the same time, the WDT can also generate an
internal reset signal or internal NMI interrupt signal.
When this watchdog function is not needed, the WDT can be used as an interval timer. In interval
timer mode, an interval timer interrupt is generated each time the counter overflows.
17.1.1
Features
WDT features are listed below.
• Switchable between watchdog timer mode and interval timer mode
WOVI interrupt generation in interval timer mode
• Internal reset or internal interrupt generated when the timer counter overflows
Choice of internal reset or NMI interrupt generation in watchdog timer mode
• Choice of 8 counter input clocks
Maximum WDT interval: system clock period × 131072 × 256
Rev. 1.0, 02/00, page 347 of 1141
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