Hitachi H8S/2199 Hardware Manual page 688

Single-chip microcomputer
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Additional V Pulses When Sync Signal is Not Detected: With additional V pulses, the pulse
signal (OSCH) detected by the sync signal detector is superimposed on the V pulse and Mlevel
signals generated by the head-switch timing generator. If there is a lot of noise in the input sync
signal (Csync), or a pulse is missing, OSCH will be a complementary pulse, and therefore an H
pulse of the period set in HRTR and HPWR will be superimposed. In this case, there may be
slight timing drift compared with the normal sync signal, depending on the HRTR and HPWR
setting, with resultant discontinuity.
If no sync signal is input, the additional V pulse is generated as a complementary pulse. Set the
sync signal detector registers and activate the sync signal detector by manipulating the SYCT bit
in the sync signal control register (SYNCR). See section 26.15.7, Activation of the Sync Signal
Detector.
Figures 26.45 and 26.46 show the additional V pulse timing charts.
HSW signal edge
Mlevel
signal
Vpulse
signal
OSCH
Additional
V pulse
Figure 26.45 Additional V Pulse when Positive Polarity Is Specified
Rev. 1.0, 02/00, page 682 of 1141
VPON=1, CUT=0, POL=1

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