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H'D06F: Additional V Control Register ADDVR: Additional V Signal Generator
Bit
:
7
—
Initial value
:
1
R/W
:
—
H'D070 to H'D071: X-Value Data Register
15
Bit
:
—
Initial value
:
1
—
R/W
:
H'D072 to H'D073: TRK-Value Data Register
15
Bit
:
—
Initial value
:
1
—
R/W
:
Rev. 1.0, 02/00, page 1010 of 1141
6
5
HMSK
—
—
1
1
—
—
OSCH mask bit
0 OSCH added
1 OSCH not added
14
13
12
11
—
—
—
XD11 XD10
1
1
1
0
—
—
—
W
14
13
12
11
—
—
—
TRD11 TRD10
1
1
1
0
—
—
—
W
4
3
2
HiZ
CUT
0
0
0
R/W
R/W
R/W
Additional V output control bits
CUT
VPON
0
1
Note: * Don't care.
High impedance bit
0 3-level output from Vpulse pin
1 Vpulse pin is set as 3-state (H/L/HiZ) pin
(Initial value)
XDR: X-Value, TRK-Value Adjustment Circuit
10
9
8
7
XD9 XD8
XD7 XD6
0
0
0
0
W
W
W
W
TRDR: X-Value, TRK-Value Adjustment Circuit
10
9
8
7
TRD9 TRD8
TRD7 TRD6
0
0
0
0
W
W
W
W
1
0
VPOM
POL
0
0
R/W
R/W
POL
Description
0
*
Low level
1
0
Negative polarity
1
Positive polarity
*
0
Immediate level
(high-impedance when HiZ bit = 1)
1
High level
(Initial value)
6
5
4
3
XD5 XD4
XD3 XD2
0
0
0
0
W
W
W
W
6
5
4
3
TRD5 TRD4
TRD3 TRD2
0
0
0
0
W
W
W
W
(Initial value)
2
1
0
XD1 XD0
0
0
0
W
W
W
2
1
0
TRD1 TRD0
0
0
0
W
W
W
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