Hitachi H8S/2199 Hardware Manual page 579

Single-chip microcomputer
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Reference Period Mode Register 2 (RFM2)
Bit :
TBC
Initial value :
R/W
R/W :
REM2 is an 8-bit read/write register which determines the operational state of the reference signal
generators.
It is initialized to H'FE by a reset and in stand-by and module stop modes. RFM2 is a byte access-
only register; if accessed by a word, correct operation is not guaranteed.
Bit 7    TBC Selection Bit (TBC): Selects whether the reference signal in PB mode is generated
by the VD signal or by the free-run counter.
Bit 7
TBC
Description
0
Generated by the VD signal
1
Generated by the free-run counter
Bits 6 to 1    Reserved: Cannot be modified and are always read as 1.
Bit 0    Field Selection Bit (FDS): Determines whether selection between ODD or EVEN is made
for the field signal when PB mode was switched over to REC mode, or these signals are
synchronized with VD signals within a phase error of 90° immediately after the switching over.
Bit 0
FDS
Description
0
Generated by the VD signal of ODD or EVEN selected
1
Generated by the VD signal within mode transition phase error of 90°
7
6
1
1
5
4
1
1
3
2
1
1
Rev. 1.0, 02/00, page 573 of 1141
1
0
FDS
1
0
R/W
(Initial value)
(Initial value)

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