Bsr Instruction - Hitachi H8S/2199 Hardware Manual

25.3.4

BSR Instruction

1. BSR Instruction (8-bit displacement)
When the trap address is the next instruction to the BSR instruction and the addressing mode is
an 8-bit displacement, transition is made to the address trap interrupt after prefetching the
instruction at the branch. The address to be stacked is 02C2.
instruc-
pre-fetch
φ
Address bus
0294
Interrupt
request
signal
Note: * Trap setting address
The underlines address is the one to be actually stacked.
BSR NOP MOV
instruc- instruc-
tion tion tion
pre-fetch pre-fetch
0296 02C2 SP-2
BSR execution
Figure 25.10 BSR Instruction (8-bit Displacement)
Stack Start of
saving exception handling
SP-4 02C4
(@ER0 = H'02C2)
0294 BSR @ER0
0296 NOP
*
0298 NOP
: :
02C2 MOV.W R4, @OUT
02C4 NOP
Rev. 1.0, 02/00, page 541 of 1141