Table of Contents
Advertisement
• Mask timer
The capstan mask timer is a 6-bit reload timer that uses a prescaled clock as a clock source.
The mask timer is used for masking DVCFG signal intended for controlling the capstan speed.
The capstan mask timer prevents edge detection to be carried out for an unnecessarily long
duration by masking the edge detection for a certain period. The above trouble can result from
abnormal revolution (runout) of the capstan motor because its revolution has to cover a wide
range speeds from the low/still up to the high speed search.
The capstan mask timer is started by a pulse edge in the divided CFG signal (DVCFG). While
the timer is running, a mask signal disables the output of further DVCFG pulses. The mask
signal is shown in figure 26.67.
The mask timer status can be monitored by reading the CMK flag in the DVCFG control
register (CDVC).
DVCFG
Mask
Mask timer
underflow
Figure 26.67 Mask Signal
Rev. 1.0, 02/00, page 729 of 1141
Advertisement
Table of Contents
