Hitachi H8S/2199 Hardware Manual page 1054

H'D12D: Prescaler Unit Control/Status Register PCSR: PSU
Bit :
7
ICIF
Initial value :
0
R/(W)*
R/W :
Input capture interrupt flag
0
1
Note: * Only 0 can be written to clear the flag.
Rev. 1.0, 02/00, page 1052 of 1141
6 5
ICIE ICEG
0 0
R/W R/W
IC pin edge select bit
0
1
Input capture interrupt enable bit
0 Interrupt request by input capture is disabled (Initial value)
1 Interrupt request by input capture is enabled
[Clearing conditions]
When 0 is written after reading 1
[Setting conditions]
When input capture is executed at IC pin edge
4 3
NCon/off
—
0 1
R/W
—
Frequency division clock output select bits
DCS2 DCS1
0 0
1
1 0
1
Noise cancel ON/OFF bit
0 Noise cancel function of IC pin is disabled (Initial value)
1 Noise cancel function of IC pin is enabled
Falling edge of IC pin input is detected
Rising edge of IC pin input is detected
(Initial value)
2 1
DCS2 DCS1
0 0
R/W R/W
Description
DCS0
PSS, output φ/32
0
PSS, output φ/16
1
PSS, output φ/8
0
PSS, output φ/4
1
PSW, output φW/32
0
PSW, output φW/16
1
PSW, output φW/8
0
PSW, output φW/4
1
(Initial value)
0
DCS0
0
R/W
(Initial value)