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Item
Symbol
5(6 pin low level
t
REL
width
Input pin high level
t
IH
width
Input pin low level
t
IL
width
Applicable
Test
Pins
Conditions
5(6
Vcc = 2.7 V to
5.5 V
,543 to ,548,
Vcc = 2.7 V to
,&, $'75*,
5.5 V
TMBI, FTIA,
FTIB, FTIC,
FTID,
RPTRIG
,543 to ,548,
Vcc = 2.7 V to
,&, $'75*,
5.5 V
TMBI, FTIA,
FTIB, FTIC,
FTID,
RPTRIG
V
IH
OSC1
V
IL
t
CPH
t
CPr
Figure 30.10 System Clock Timing
t
t
EXCLH
V
IH
X1
V
IL
t
EXCLr
Figure 30.11 Subclock Input Timing
Values
Min
Typ
20
2
2
t
cyc
t
CPL
t
CPf
subcyc
t
EXCLL
Vcc × 0.5
t
EXCLf
Rev. 1.0, 02/00, page 909 of 1141
Max
Unit
Figure
t
Figure
cyc
30.13
t
Figure
cyc
t
30.14
subcyc
t
cyc
t
subcyc
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