Register Configuration - Hitachi H8S/2199 Hardware Manual

Single-chip microcomputer
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24.1.4

Register Configuration

Table 24.2 summarizes the registers of the A/D converter.
Table 24.2 A/D Converter Registers
Name
Software trigger A/D
result register H
Software trigger A/D
result register L
Hardware trigger A/D
result register H
Hardware trigger A/D
result register L
A/D control register
A/D control/status
register
A/D trigger selection
register
Port mode register 0
Notes: 1. Only 0 can be written in bits 7 and 6, to clear the flag. Bits 3 to 1 are read-only.
2. Lower 16 bits of the address.
Rev. 1.0, 02/00, page 516 of 1141
Abbrev.
R/W
ADRH
R
ADRL
R
AHRH
R
AHRL
R
ADCR
R/W
ADCSR
R (W)
ADTSR
R/W
PMR0
R/W
Size
Byte
Byte
Byte
Byte
Byte
*1
Byte
Byte
Byte
Initial Value
Address
H'00
H'D130
H'00
H'D131
H'00
H'D132
H'00
H'D133
H'40
H'D134
H'01
H'D135
H'FC
H'D136
H'00
H'FFCD
*2

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