Slave Address Register (Sar) - Hitachi H8S/2199 Hardware Manual

Single-chip microcomputer
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23.2.2

Slave Address Register (SAR)

Bit :
SVA6
Initial value :
R/W :
R/W
SAR is an 8-bit readable/writable register that stores the slave address and selects the
communication format. When the chip is in slave mode (and the addressing format is selected), if
the upper 7 bits of SAR match the upper 7 bits of the first frame received after a start condition,
the chip operates as the slave device specified by the master device. SAR is assigned to the same
address as ICMR, and can be written and read only when the ICE bit is cleared to 0 in ICCR.
SAR is initialized to H'00 by a reset.
Bits 7 to 1    Slave Address (SVA6 to SVA0): Set a unique address in bits SVA6 to SVA0,
differing from the addresses of other slave devices connected to the I
Rev. 1.0, 02/00, page 466 of 1141
7
6
SVA5
SVA4
0
0
R/W
R/W
5
4
SVA3
SVA2
0
0
R/W
R/W
3
2
SVA1
SVA0
0
0
R/W
R/W
2
C bus.
1
0
FS
0
0
R/W

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