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Table 22.8 SMR1 Settings and Serial Transfer Format Selection
SMR1 Settings
Bit 7
Bit 6
Bit 2
C/$ $ $ $
CHR
MP
0
0
0
1
0
1
1
1
Table 22.9 SMR1 and SCR1 Settings and SCI Clock Source Selection
SMR1 SCR1 Setting
Bit 7
Bit 1
Bit 0
C/$ $ $ $
CKE1
CKE0
0
0
0
1
1
0
1
1
0
0
1
1
0
1
Bit 5
Bit 3
PE
STOP
Mode
0
0
Asynchro-
nous mode
1
1
0
1
0
0
1
1
0
1
0
Asynchro-
nous mode
1
(multi-
0
processor
format)
1
Clock
synchronous
mode
Mode
Asynchronous
mode
Clock
synchronous
mode
SCI Transfer Format
Data
Length
8-bit
data
7-bit
data
8-bit
data
7-bit
data
8-bit
data
SCI Transfer Clock
Clock Source
SCK Pin Function
Internal
SCI does not use SCK pin
Outputs clock with same frequency
as bit rate
External
Inputs clock with frequency of 16
times the bit rate
Internal
Outputs serial clock
External
Inputs serial clock
Multiproc-
Parity
essor Bit
Bit
No
No
Yes
No
Yes
Yes
No
No
Rev. 1.0, 02/00, page 423 of 1141
Stop Bit
Length
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
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