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CHAPTER 3 INTERRUPTS
3.7
Software Interrupts
In response to execution of a special instruction, control is transferred from the program
currently executed by the CPU to the interrupt processing program defined by the user.
This is called the software interrupt function. A software interrupt occurs always when
the software interrupt instruction is executed.
■ Software interrupts
A software interrupt request issued by the INT instruction has no interrupt request or enable flag. A software
interrupt request is always issued and accepted by executing the INT instruction.
The INT instruction does not have an interrupt level. Therefore, the INT instruction does not update ILM.
The INT instruction clears the I flag to suspend subsequent hardware interrupt requests.
The CPU performs the following processing when a software interrupt occurs:
•
Saves the values in the PC, PS, AH, AL, PCB, DTB, ADB, and DPR registers of the CPU to the system
stack.
• The S flag is set.
•
Clears I in the PS register. Hardware interrupts are automatically disabled.
•
Fetches the corresponding interrupt vector and branches to the processing indicated by that value.
■ Structure of the software interrupt system
Software interrupts are fully handled within the CPU. To use a software interrupt, make the following set-up:
• Interrupt vector (in memory)
- Consider the TBR value for a non-default location of the vector table.
- The start address of the interrupt service routine has to be written to the appropriate interrupt vector
(VecAddr = 4*(255-INT#) + 256*TBR).
• CPU
- During interrupt processing, the CPU saves 12 bytes to the memory area indicated by SSB and SSP.
Thus the system stack pointer has to be initialized before using interrupts.
- The CPU fetches three bytes of the interrupt vector and loads them onto PC and PCB. The interrupt
handler routine has to start at this location. As a result, the interrupt processing program defined by the
user is executed next. Normal operation is resumed at execution of the RETI instruction.
■ Software interrupt operation
When the CPU fetches and executes the software interrupt instruction, the software interrupt processing
sequence is activated. The software interrupt processing sequence saves 12 bytes (PS, PC, PCB, DTB, ADB,
DPR, and A) to the memory area indicated by SSB and SSP. The sequence then fetches three bytes of
interrupt vector and loads them into PC and PCB, resets the I flag, and sets the S flag. Then, the sequence
performs branch processing. As a result, the interrupt processing program defined by the user application
program is executed next.
Figure 3.7-1 "Occurrence and release of software interrupt" illustrates the flow from the occurrence of a
software interrupt until the return from the interrupt processing program.
104
MB96300 Super Series Hardware Manual
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