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CHAPTER 27 STEPPER MOTOR CONTROLLER
27.5
PWM1 and PWM2 Compare Registers (PWC1n, PWC2n)
The value of the two 8 (10) bits compare register of PWM1 and PWM2 (PWC1n, PWC2n)
determine the width of the PWM pulse. The stored "00
PWM duty is 0%, and the stored "FF
99.6% (99.9%).
■ PWM1 and PWM2 Compare registers (PWC1n, PWC2n)
The PWM1 and PWM2 Compare registers can be accessed at any time, but the changed value is reflected in
the pulse width at the end of the current PWM cycle after "1" is set to the BS bit of the PWM2 selection
register.
When "0" is set to SC bit of the PWM Control register, and PWM performs 8-bit operation, the D9 and D8
bits are undefined value.
PWM1&2 Compare registers must be read or written 16-bit wide.
[bit 15 to 10] Reserved bit
Always set the reserved bit to "0".
[bits 9 to 0] D9 to D0: Compare data
These bits are used to set the PWM pulse width.
698
" ("3FF
H
Figure 27.5-1 PWM1&2 compare registers
PWM1 Compare register (PWC1x)
15
14
13
-
-
-
-
-
-
7
6
5
D7
D6
D5
R/W R/W R/W R/W R/W
PWM2 Compare register (PWC2x)
15
14
13
-
-
-
-
-
-
7
6
5
D7
D6
D5
R/W R/W R/W R/W R/W
MB96300 Super Series Hardware Manual
(000
)" value indicates that the
H
H
") value indicates that the PWM duty is
H
12
11
10
9
8
Initial value:
-
-
D8
-
D9
- - - - - - x x
-
-
-
R/W R/W
4
3
2
1
0
Initial value:
D4
D3
D0
D2
D1
x x x x x x x x
R/W R/W R/W
12
11
10
9
8
Initial value:
-
-
D8
-
D9
- - - - - - x x
-
-
-
R/W R/W
4
3
2
1
0
Initial value:
D4
D3
D0
D2
D1
x x x x x x x x
R/W R/W R/W
B
B
B
B
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