21.2.2
Bus Control Register (IBCRn)
The Bus Control Register (IBCRn) has the following functions:
• Interrupt enabling flags
• Interrupt generation flag
• Bus error detection flag
• Repeated start condition generation
• Master / slave mode selection
• General call acknowledge generation enabling
• Data byte acknowledge generation enabling
■ Bus control register (IBCRn)
Write access to this register should only occur while the INT="1" or if a transfer is to be started. The user
should not write to this register during an ongoing transfer since changes to the ACK or GCAA bits could
result in bus errors. All bits in this register except the BER and the BEIE bit are cleared if the interface is
not enabled (EN="0" in ICCR).
CHAPTER 21 400 kHz I
2
C INTERFACE
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