Fujitsu MB96300 series Hardware Manual page 334

CHAPTER 12 EXTERNAL BUS INTERFACE
Figure 12.3-4 Multiplexed 16-bit bus: Word and Byte access for EACL:STS='1' and EACL:ACE='1'
ECLK
A[23:16]
A[15:00]
CS1
CS2
UB
LB
ALE
RD
AD[15:08]
AD[07:00]
WR
WRH
WRL
AD[15:08]
AD[07:00]
CLKB
AD
WR
WD
RD
READY
326
Addr 1 (CS1 area)
Port function or other resource (address function not used in multiplexed external bus mode)
Addr 1
Addr 1
Addr 1
Addr 1
16 bit access
Addr 1 Addr 2
WR 1 WR 2
Write Data 1
MB96300 Super Series Hardware Manual
Addr 2 (CS1 area)
RD1 Addr 2
RD1 Addr 2
Write Data 1 Addr 2
Write Data 1 Addr 2
8 bit access
(even address)
Addr 3
WR 3
Write Data 2
RD1
Addr 3
Addr 3
RD2 Addr 3
Addr 3
undefined data
Write Data 2 Addr 3
RD2