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CHAPTER 8 RESETS AND STARTUP
8.7
Operation of the low voltage reset function
This section describes the operation of the low voltage reset function.
■ Function of the low voltage reset
The low voltage reset function is using the low voltage detector that compares the power supply voltage V
with an internally generated reference voltage. This reference voltage is programmable with the
CILCR:LVL[3:0] bits.
If the reset function and the low voltage detector are enabled by the Low Voltage Reset Enable (LVRE) and
the Low Voltage Detector Enable (LVDE) bits and V
Power reset extension counter is initialized and the PRST flag is set. See the datasheet for the specification of
the selectable detection levels V
After recovery of the power supply voltage, the Power reset extension counter is released and the startup
performed as described in section 8.3 "Startup after Power and External reset".
■ Configuration of the low voltage detection and reset circuit
●
Low voltage reset
The low voltage reset is controlled by the Low Voltage Reset Enable (LVRE) bit. Setting this bit to "0"
disables the low voltage reset function and setting the bit to "1" enables the function. After Power-on or when
asserting RST, this bit is always set to "1" (reset function enabled).
The LVRE bit must be set to "0" when the low voltage detector should be disabled. When the low voltage
detector is switched on, the low voltage detector stabilization time must be applied before setting LVRE to
"1". Otherwise a low voltage reset could be asserted wrongly because the low voltage detector outputs a
wrong value. See the datasheet for the specification of the low voltage detector stabilization time.
In devices in which the low voltage reset circuit is always enabled in the internal vector mode, the setting of
the LVRE bit has no effect for Mode pins set to "011".
●
Low voltage detector
The low voltage detector is controlled by the Low Voltage Detector Enable (LVDE) bit and the CILCR:LVL
level select bits. Setting the LVDE bit to "0" disables the low voltage detector and setting the bit to "1"
enables the detector. After Power-on or when asserting RST, this bit is always set to "1" (low voltage
detector enabled). The CILCR:LVL level select bits are reset to "0000" (Level 0) by any reset.
When LVDE is set to "0", the LVRE bit must also be set to "0" at the same time or before. When the low
voltage detector is switched on, the low voltage detector stabilization time must be applied before setting
LVRE to "1".
In devices in which the low voltage reset circuit is always enabled in the internal vector mode, the setting of
the LVDE bit has no effect for Mode pins set to "011" (low voltage detector is always active).
The detection level is always set to "Level 0" after reset. With this level, a reset can be generated when V
falls below the minimum value required for safe operation of the MCU. This level can be increased after
startup by setting the CILCR:LVL bits. This allows the generation of a Low Voltage reset already at higher
V
levels in case this is required by the system.
CC
224
falls below the selected detection level V
CC
.
DL
MB96300 Super Series Hardware Manual
CC
, then the
DL
CC
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