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MB96300 Super Series Hardware Manual
20.6.2
Restarting the Reload Counter
The Reload Counters can be restarted of the following reasons:
Transmission and reception reload counter:
• Global MCU reset
• USART programmable clear (SMRn:UPCL bit)
• User programmable restart (SMRn:REST bit)
Reception reload counter:
• Start bit falling edge detection in asynchronous mode
■ Programmable restart
If the REST bit of the Serial Mode Register (SMRn) is set by the user, both Reload Counters are restarted at
the next clock cycle. This feature is intended to use the Transmission Reload Counter as a small timer.
The following figure illustrates a possible usage of this feature (assume that the reload value is 100.)
CLKP1
Reload
Counter
Clock
Outputs
REST
Reload
Value
Read
BGRx
Data
Bus
In this example the number of peripheral clock CLKP1 cycles (cyc) after REST is then:
cyc = v - c + 1 = 100 - 90 + 1 = 11,
where v is the reload value and c is the read counter value.
Note:
If USART is reset by setting SMRn:UPCL, the Reload Counters will restart too.
Figure 20.6-3 Reload counter restart example
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CHAPTER 20 USART
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