Flash Memory Control Registers - Fujitsu MB96300 series Hardware Manual

CHAPTER 33 FLASH MEMORY
33.4

Flash Memory Control Registers

This chapter describes the control/status registers which are needed to control the
flash memory erase/write process and to configure read access timing.
■ Flash Memory Control Registers
The "main" flash memory is controlled by the following registers:
• "Main" Flash Memory Control/Status register MFMCS
• "Main" Flash Memory Timing Configuration registers MFMTCL/MFMTCH
The "satellite" flash memory is controlled by the following registers:
• "Satellite" Flash Memory Control/Status register SFMCS
• "Satellite" Flash Memory Timing Configuration registers SFMTCL/FMTCH
The permission to erase/write a sector of the Flash memory is strored in the following register:
• "Main" Flash Memory Write Control registers FMWC0-5
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