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MB96300 Super Series Hardware Manual
• etc.
■ 16-bit Input Capture registers
15
15
ICE(2n+0)/(2n+1)
Remark:
The suffix "n" denotes the number of the Input Capture Unit (0, 1, 2, ...). The register name is composed by the
register type name and the suffix. Hence, the following registers are available:
• for Input Capture Unit 0: IPCP0, IPCP1, ICS01, ICE01
• for Input Capture Unit 1: IPCP2, IPCP3, ICS23, ICE23
• etc.
IPCP(2n+0)
IPCP(2n+1)
ICS(2n+0)/(2n+1)
CHAPTER 14 16-BIT I/O TIMER
0
Capture register 2n+0
0
Capture register 2n+1
Control Register (2n+0)/(2n+1)
Capture Edge Register (2n+0)/(2n+1)
367
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