Fujitsu MB96300 series Hardware Manual page 832

CHAPTER 31 MEMORY PATCH FUNCTION
Table 31.2-2 lists the correspondence between the patch function address registers PFAx, the patch function
data registers PFDx and the patch function control/status register PFCSx.
Table 31.2-2 Correspondence between PFAx, PFDx and PFCSx
Patch address (PFA)
PFA0
PFA1
PFA2
PFA3
PFA4
PFA5
PFA6
PFA7
824
AR=0 AR=0 AR=1
AM=0 AM=1
point point start
point
point mask end
point
point point start
point
point mask end
point
point point start
point
point mask end
point
point point start
point
point mask end
point
MB96300 Super Series Hardware Manual
Patch
data Control/status register (PFCS)
(PFD)
Access
Type
[15:8]
PFD0 PFCS0 PFCS0
PFD1
PFD2 PFCS1 PFCS1
PFD3
PFD4 PFCS2 PFCS2
PFD5
PFD6 PFCS3 PFCS3
PFD7
Operation select/status [7:0]
I0 IE0 PE0 AM
I1 IE1 PE1
I0 IE0 PE0 AM
I1 IE1 PE1
I0 IE0 PE0 AM
I1 IE1 PE1
I0 IE0 PE0 AM
I1 IE1 PE1
AR
AR
AR
AR