Table of Contents
Advertisement
MB96300 Super Series Hardware Manual
CHAPTER 22 CAN CONTROLLER
values of these bits in the Message Control Register always reflect the status before resetting the bits.
To assure the correct function of a FIFO Buffer, the CPU should read out the Message Objects starting at the
FIFO Object with the lowest message number. Figure 22.9-4 "CPU Handling of a FIFO Buffer" shows how
a set of Message Objects which are concatenated to a FIFO Buffer can be handled by the CPU.
625
Advertisement
Table of Contents
