Register Description - Fujitsu MB96300 series Hardware Manual

F2mc-16fx 16-bit
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MB96300 Super Series Hardware Manual
25.2

Register Description

This section lists the registers of the calibration unit and describes the function of each
register in detail.
■ Clock Calibration Unit registers
+0
CUCR [R/W]
---0--00 --------
CUTR1 [R]
00000000 --------
■ Clock Calibration Unit Control Register (CUCR)
Control Register low byte
The Clock Calibration Unit Control Register (CUCR) has the following functions:
start / stop calibration measurement
enable / disable interrupt
indicates the end of the calibration measurement
BIT[0]: INTEN - Interrupt enable
0
interrupt disabled (default)
1
interrupt enabled
This is the interrupt enable bit corresponding to the INT bit. When this bit is set to 1 and the INT bit is set
by the hardware, the calibration module signals an interrupt to the CPU. The INT-bit itself is not affected
by the INTEN bit and is set by hardware even if interrupts are disabled (INTEN=0).
BIT[1]: INT - Interrupt
0
calibration ongoing / module inactive (default)
1
calibration completed
This bit indicates the end of the calibration. When the Duration Timer reaches zero after the start of
calibration, the Calibration Timer Data Register stores the last Calibration Timer value and the INT bit is
set to 1.
The read-modify-write operation to this bit results in reading 1. Writing 0 to this bit clears this flag
(INT=0). Writing 1 to this bit has no effect.
The interrupt flag INT is not reset by hardware. Therefore it must be reset by software before starting a
Register
+1
CUTD [R/W]
00000000 10000000
CUTR2 [R]
00000000 00000000
7
6
RES
-
Read/write ⇒ (W0/R) (R)
(X)
(0)
Default value⇒
CHAPTER 25 CLOCK CALIBRATION UNIT
+2
+3
5
4
3
2
-
STRT
-
CKSEL
INT
(R) (R/W)
(R) (R/W) (R/W) (R/W)
(0)
(0)
(0)
(0)
(0)
⇐ Bit no.
1
0
CUCR
INTEN
(0)
661

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