Rom Interface Registers - Fujitsu MB96300 series Hardware Manual

34.2

ROM interface registers

This chapter describes the ROM interface registers. It includes 3 configuration
registers: the ROM security MFMSEC, the ROM Control Status register MFMCS and the
ROM Timing Configuration register (MFMTC0).
■ ROM control/status register (MFMCS)
In the description below, the bit described in grey do exist in the ROM interface and indicate thus the
compatibility with the Flash interface. In case of a ROM, those bits have no functionnality.
CHAPTER 34 MASK-ROM MEMORY INTERFACE
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