Read Buffers - Fujitsu MB96300 series Hardware Manual

F2mc-16fx 16-bit
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CHAPTER 34 MASK-ROM MEMORY INTERFACE
34.3

Read buffers

Two independent read buffers are implemented: the first one for Code fetch, the second
one for Data fetch.
■ Read buffer features
• Code fetch read buffer is enabled with MFMCS:CRBE=1. Data fetch read buffer is enabled with
MFMCS:DRBE=1.
• Both read buffers memorize the complete read data (32-bit wide) with the corresponding address. The
data is driven to the system bus with 0 wait cycles when the current address equals to the memorized
address.
• Both read buffers are invalidated by a write access to the area selected or at a transition to standby
mode. The invalidating during write is only done for compatibility with the Flash interface.
• The data read buffer is updated at any ROM data read access. The code read buffer is updated at any
ROM code read access.
• In case of a buffer hit, the buffered data is output independently of the current transfer type (e.g. data in
the "code" buffer can be output if current transfer type is "data").
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