Dma Descriptor - Fujitsu MB96300 series Hardware Manual

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MB96300 Super Series Hardware Manual
4.3

DMA Descriptor

For each DMA channel the DMA descriptor consists of 8 bytes. It is used to set-up DMA
transfer.
■ Configuration of DMA Descriptors
Each DMA channel has its own DMA descriptor of 8 bytes. The DMA descriptors are located from addresses
000100
to 00017F
H
The descriptor areas of not available channels are not accessible. Write access has no effect. Read access
returns undefined values.
Before changing the configuration of a DMA channel it has to be ensured that the associated IRQ is
deactivated. Alternatively the EN bit of the channel to be updated must be cleared.
Table 4.3-1 Relation of DMA channel numbers and DMA descriptor addresses
DMA Channel
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
The structure of each channel is as shown in Figure 4.3-1 "Configuration of the DMA Descriptor".
. The following table shows the relation of DMA channels to the descriptor addresses.
H
Descriptor Start Address
000100
H
000108
H
000110
H
000118
H
000120
H
000128
H
000130
H
000138
H
000140
H
000148
H
000150
H
000158
H
000160
H
000168
H
000170
H
000178
H
CHAPTER 4 DMA
Descriptor End Address
000107
H
00010F
H
000117
H
00011F
H
000127
H
00012F
H
000137
H
00013F
H
000147
H
00014F
H
000157
H
00015F
H
000167
H
00016F
H
000177
H
00017F
H
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