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MB96300 Super Series Hardware Manual CHAPTER 9 STANDBY MODE AND VOLTAGE REGULATOR CONTROL
Table 9.2-1 Function description of each bit of the standby mode control register (SMCR)
Bit name
bit 0 -
SMS0 and SMS1:
bit 1
Standby Mode Select
bits
bit 2
SPL:
Pin state setting bit
(for Timer and Stop
mode)
bit 3
LPMS:
Low Power Mode Set
bit
• These bits request switching to a Standby mode according to the following table:
bit1
bit0
SMS1
SMS0
0
0
Run mode
0
1
Requests a transition to Sleep mode
1
0
Requests a transition to Timer mode
1
1
Requests a transition to Stop mode
• When "01" is written to these bits, a switch to Sleep mode is requested.
• When "10" is written to these bits, a switch to Timer mode is requested.
• When "11" is written to these bits, a switch to Stop mode is requested.
• After writing one of these three values, the bits are locked. It is not possible to select
another Standby mode or Run mode.
• These bits are cleared to "00" by any pending hardware interrupt request (level smaller
than 7), an NMI (if available) and by any reset.
• The read value of these bits shows the status of the Standby mode transition request.
Reading a value other than "00" means that the transition to the selected Standby mode
is still pending while reading "00" means that there is no Standby mode transition
request pending.
• The setting of this bit effects only the Timer mode and Stop mode.
• When this bit is set to "0", the level of the external pins is retained.
• When this bit is set to "1", the status of the external pins changes to high-impedance.
• This bit is initialized to "0" by a reset.
• This bit controls the voltage regulator in any mode. Refer to section 9.7 "Voltage
Regulator Operation" for details.
• This bit is cleared by any reset.
• When this bit is set to "0" (initial value), then the voltage regulator is controlled
automatically (regulator in High Power Mode when RC oscillator or Main oscillator is
active).
• Setting this bit to "1" forces the voltage regulator immediately to the Low Power Mode
A (unless Stop mode is entered where regulator is always set to Low Power Mode B).
This means the regulator output voltage is defined by the VRCR:LPMA[2:0] bits.
• Setting this bit is permitted only in certain modes described in section 9.7 "Voltage
Regulator Operation".
• After changing this bit back to "0", a stabilization time of 40µs must be applied by the
application program before changing to a mode with a higher current consumption.
Function
Standby Mode Select bits
235
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