Fujitsu MB96300 series Hardware Manual page 591

F2mc-16fx 16-bit
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MB96300 Super Series Hardware Manual
Table 22.3-1 CAN Register Summary
Offset
CANn base address + 0xB2
CANn base address + 0xB3
CANn base address + 0xBE
■ Hardware Reset Description
After hardware reset, the registers of the CAN hold the values described as initial value in Table 22.3-1 .
Additionally, the busoff state is reset and the output CAN_TX is set to recessive (HIGH). The value 0x0001
(INIT = '1') in the CAN Control Register CTRLRLn enables the software initialisation. The CAN does not
influence the CAN bus until the CPU resets INIT to '0'.
The data stored in the Message RAM is not affected by a hardware reset. After power-on, the contents of the
Message RAM is undefined.
Byte Register
Word Register
Name
Name
MSGVAL2Ln
MSGVAL2n
MSGVAL2Hn
COERn
CHAPTER 22 CAN CONTROLLER
Description
CAN n - Message Valid
Register
CAN n - Message Valid
Register
CAN n - Output enable
register
Initial value
00000000
00000000
XXXXXXX0
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