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MB96300 Super Series Hardware Manual
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The two input channels can operate independently.
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An interrupt can be issued upon a valid edge of an external input signal.
The DMA can be activated upon an input capture interrupt.
■ Block diagram of the 16-bit I/O Timer
Figure 14.1-1 shows a block diagram of the 16-bit I/O Timer.
Note: Please refer to the first chapter Table 1.12-1 to check the connections between input/output capture
units and free running timers.
Figure 14.1-1 Block diagram of 16-bit I/O Timer
Control logic
Interrupt
16-bit Free-Running Timer 0/1/...
16-bit timer
Output Compare Unit 0/2/4/6/...
Compare register 0
Output Compare Unit 1/3/5/7/...
Compare register 1
Input Capture Unit 0/2/4/6/...
Capture register 0
Input Capture Unit 1/3/5/7/...
Capture register 1
CHAPTER 14 16-BIT I/O TIMER
Clear
T Q
T Q
Edge selection
Edge selection
FRCK0
FRCK1
.
.
OUT0
OUT2
OUT4
OUT6
OUT1
OUT3
OUT5
OUT7
.
.
IN0
IN2
IN4
IN6
IN1
IN3
IN5
IN7
365
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